Modified by 2015.05.02
Every main IPCore all has the same structure of folders, they include HDL files, software simulations, HDL functional simulations, etc. This picture shows you what and how can this module do, and the functions of folders:
FPGA project, and packaged IPCore will be here, built on xilinx vivado.
A folder for storing images, you can put your images for testing here, "jpg" and "bmp" are supported, moreover, a file named "conf.json" is used for setting configurations for simulations.
Python source for software simulation will be here, those can show you this module's function by software method.
The results will be placed in "SimResCheck" folder.
Python source for creating a ".dat" file which can be used for hdl function simulation.
Tthe dat file will be placed in "FunSimForHDL" folder.
HDL functional simulation with modelsim will be done here.
Python source named "covert.py" will covert images from the results of hdl function simulation, software simulation's result also will be here, and an source named "compare.py" is used for creating a report for software simulation and functional simulation.