Crop
Modified by 2015.05.14
Design
Crop
Version
1.0
Modified
2015-05-25
Source
IP-GUI
Function
Cropping images, depending on your top, bottom, left and right coordinate.
Give the first output after 1 cycle while the input enable.
Files
| Name | Function |
|---|---|
| Crop.v | Main module |
| Crop_TB.sv | Test bench |
Parameters
| Name | Type | Range | Default | Description |
|---|---|---|---|---|
| work_mode | unsigned | 0 for Pipeline, 1 for Req-ack | 0 | This module's working mode. |
| data_width | unsigned | None | 8 | Data bit width. |
| im_width | unsigned | 1 - 4096 | 320 | Width of image. |
| im_height | unsigned | 1 - 4096 | 240 | Height of image. |
| im_width_bits | unsigned | Depend on width of image | 9 | The bits of width of image. |
Ports
| Name | Port | Type | Range | Default | Description |
|---|---|---|---|---|---|
| clk | input | unsigned | None | None | Clock. |
| rst_n | input | unsigned | None | None | Reset, active low. |
| top | input | unsigned | Depend on height of image, 0 - im_height-1. | None | Top of the rang you want to crop. |
| bottom | input | unsigned | Depend on height of image, 0 - im_height-1. | None | Bottom of the rang you want to crop. |
| left | input | unsigned | Depend on height of image, 0 - im_width-1. | None | Left of the rang you want to crop. |
| right | input | unsigned | Depend on height of image, 0 - im_width-1. | None | Right of the rang you want to crop. |
| in_enable | input | unsigned | None | None | Input data enable, in pipeline mode, it works as another rst_n, in req-ack mode, only it is high will in_data can be really changes. |
| in_data | input | unsigned | data_width - 1 : 0 | None | Input data, it must be synchronous with in_enable. |
| in_count_x | input | unsigned | im_width_bits - 1 : 0 | None | Input pixel count for width. |
| in_count_y | input | unsigned | im_width_bits - 1 : 0 | None | Input pixel count for height. |
| out_ready | output | unsigned | None | None | Output data ready, in both two mode, it will be high while the out_data can be read. |
| out_data | output | unsigned | data_width - 1 : 0 | None | Output data, it will be synchronous with out_ready. |
| out_count_x | output | unsigned | im_width_bits - 1 : 0 | None | Output pixel count for height. |
| out_count_y | output | unsigned | im_width_bits - 1 : 0 | None | Output pixel count for height. |
Simulations
Simulations for this module just support Gray-scale images !
Waves
Pipeline mode
ReqAck mode
Original
Results
Conf for testing:
| Top | Bottom | Left | Right |
|---|---|---|---|
| 20 | 492 | 20 | 492 |
| 100 | 402 | 200 | 302 |
HDL functional simulation for pipeline mode is on the left, for req-ack mode is on the middle, and which on the right is the soft simulation
PSNR
| 1-100x402x200x302 | 1-20x492x20x492 | 2-100x402x200x302 | 2-20x492x20x492 | Total |
|---|---|---|---|---|
| 1000000.00 | 1000000.00 | 1000000.00 | 1000000.00 | 1000000.00 |
Utilization
512x512, width of color is 8.
| Slice LUTs* | Slice Registers |
|---|---|
| 29 | 5 |
Timing
512x512, width of color is 8.
The max Data Path Delay is 2.113ns, so:
FMax = 473.26MHz
Thanks
The sources of images for simulations:
おにねこ-メカニック・ロンド