ColorReversal
Modified by 2015.05.17
Design
ColorReversal
Version
1.0
Modified
2015-05-16
Source
IP-GUI
Function
Get a reversal of all ponit's color.Give the first output after 1 cycle while the input enable.
Files
| Name | Function |
|---|---|
| ColorReversal.v | Main module |
| ColorReversal_TB.sv | Test bench |
Parameters
| Name | Type | Range | Default | Description |
|---|---|---|---|---|
| work_mode | unsigned | 0 for Pipelines, 1 for Req-ack | 0 | This module's working mode. |
| color_channels | unsigned | None | 3 | Channels for color, 1 for gray, 3 for rgb, etc. |
| color_width | unsigned | 1 - 12 | 8 | Color's bit wide |
Ports
| Name | Port | Type | Range | Default | Description |
|---|---|---|---|---|---|
| clk | input | unsigned | None | None | Clock. |
| rst_n | input | unsigned | None | None | Reset, active low. |
| in_enable | input | unsigned | None | None | Input data enable, in pipelines mode, it works as another rst_n, in req-ack mode, only it is high will in_data can be changes. |
| in_data | input | unsigned | color_channels * color_width - 1 : 0 | None | Input data, it must be synchronous with in_enable. |
| out_ready | output | unsigned | None | None | Output data ready, in both two mode, it will be high while the out_data can be read. |
| out_data | output | unsigned | color_channels * color_width - 1 : 0 | None | Output data, it will be synchronous with out_ready. |
Simulations
Functional simulation is just supported for RGB, Gray-scale and binary images !
Waves
Pipeline mode
ReqAck mode
Original
Results
HDL functional simulation for pipeline mode is on the left, for req-ack mode is on the middle, and which on the right is the soft simulation
PSNR
| 1 | 2 | 3 | Total |
|---|---|---|---|
| 1000000.00 | 1000000.00 | 1000000.00 | 1000000.00 |
Utilization
| Slice LUTs* | Slice Registers |
|---|---|
| 49 | 25 |
Timing
The max Data Path Delay is 2.298ns, so:
FMax = 435.16MHz
Thanks
The sources of images for simulations:
パセリ-Fallen